Custom Query (13 matches)

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Ticket Summary Status Owner Priority Milestone Component
#4 ATMEGA8A: TWI simulation new dsl major MCUSim-0.2 avr
#6 ATMEGA8A: SPI simulation new dsl major MCUSim-1.0 avr
#8 Let LPM/ELPM instruction read fuse and lock bits new dsl major MCUSim-0.2 avr
#9 Update decoder to simulate multi-cycle instructions accepted dsl major MCUSim-0.2 avr
#12 ATMEGA328/328P: 8-bit Timer/Counter0 simulation accepted dsl major Work in Progress avr
#13 ATMEGA328/328P: 16-bit Timer/Counter1 simulation accepted dsl major Work in Progress avr
#14 ATMEGA328/328P: 8-bit Timer/Counter2 simulation accepted dsl major Work in Progress avr
#18 ATMEGA8A: Configure by setting fuse bytes and lock bits assigned Alexandr major MCUSim-0.2 avr
#21 ATMEGA8A: External (asynchronous) clock source of the 8-bit Timer/Counter2 assigned dsl major MCUSim-1.0 avr
#26 ATMEGA8A: External clock source of the 16-bit Timer/Counter1 new dsl major MCUSim-1.0 avr
#31 ATMEGA328/328P: Perform a hardware test to read signature bytes assigned dsl major Patches Welcome avr
#33 ATMEGA328/328P: USART simulation (with pty connection) new dsl major MCUSim-0.2 avr
#30 ATMEGA328/328P: Toggle PORTx pins accepted dsl minor Work in Progress avr
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