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Status: accepted (1 match)

Ticket Summary Owner Type Priority Component Created
#9 Update decoder to simulate multi-cycle instructions dsl task major avr 12 months ago

Status: assigned (4 matches)

Ticket Summary Owner Type Priority Component Created
#14 ATMEGA328/328P: 8-bit Timer/Counter2 simulation Pawel task major avr 12 months ago
#18 ATMEGA8A: Configure by setting fuse bytes and lock bits Alexandr task major avr 11 months ago
#32 ATMEGA8A: Incorrect use of the 'missed_cm' variable. dsl defect major avr 4 months ago
#30 ATMEGA328/328P: Toggle PORTx pins Pawel task minor avr 4 months ago

Status: new (5 matches)

Ticket Summary Owner Type Priority Component Created
#4 ATMEGA8A: TWI simulation dsl task major avr 12 months ago
#8 Let LPM/ELPM instruction read fuse and lock bits dsl task major avr 12 months ago
#13 ATMEGA328/328P: 16-bit Timer/Counter1 simulation dsl task major avr 12 months ago
#27 ATMEGA8A: Set a correct reset flag in MCUCSR dsl enhancement major avr 5 months ago
#33 ATMEGA328/328P: USART simulation (with pty connection) dsl task major avr 4 months ago
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