Timeline



Apr 15, 2018:

3:19 PM Ticket #17 (common-scripts - Create (or find) a tool to check file in 8-bit Intel HEX format) created by dsl
It can be a good idea to check format of the firmware files for mcusim …
1:11 PM Ticket #16 (avr - Update man pages for mcusim-avr and mcusim-avr-board) created by dsl
There is an outdated page avrsim/man/avrsim.1. It should be updated …

Apr 7, 2018:

10:33 PM WikiStart edited by dsl
(diff)

Apr 6, 2018:

5:39 PM Ticket #15 (mcusim-tests - Ability to create simulated boards for tests) created by dsl
We usually create a PCB in real life to test our ideas or proof a …

Apr 5, 2018:

9:24 PM WikiStart edited by dsl
(diff)
9:22 PM WikiStart edited by dsl
(diff)

Apr 2, 2018:

3:24 PM Ticket #14 (avr - ATMEGA328/328P: 8-bit Timer/Counter2 simulation) created by dsl
- Internal (synchronous) clock source - External (asynchronous) clock …
3:22 PM Ticket #13 (avr - ATMEGA328/328P: 16-bit Timer/Counter1 simulation) created by dsl
- Internal and external clock source - Prescaling - Normal mode - …
3:18 PM Ticket #12 (avr - ATMEGA328/328P: 8-bit Timer/Counter0 simulation) created by dsl
- Internal and external clock sources - Normal mode - Clear Timer on …
3:13 PM Ticket #11 (avr - Program simulated MCU using SPI) created by dsl
The main idea is to let [http://savannah.nongnu.org/projects/avrdude
3:06 PM Ticket #10 (avr - ATMEGA8A: USART simulation (with pty connection)) created by dsl
Simulated MCU may have its internal USART connected to a pseudo …
10:50 AM Ticket #9 (avr - Update decoder to simulate multi-cycle instructions) created by dsl
10:49 AM Ticket #8 (avr - Let LPM/ELPM instruction read fuse and lock bits) created by dsl
10:48 AM Ticket #7 (avr - ATMEGA8A: Boot Loader Support) created by dsl
10:47 AM Ticket #6 (avr - ATMEGA8A: SPI simulation) created by dsl
See 23. SPI – Serial Peripheral Interface datasheet section for details.
10:46 AM Ticket #5 (avr - ATMEGA8A: USART simulation) created by dsl
Note: It can also be available within OS as a device connected to a …
10:44 AM Ticket #4 (avr - ATMEGA8A: TWI simulation) created by dsl

Apr 1, 2018:

5:24 PM Ticket #3 (avr - ATMEGA8A: 8-bit Timer/Counter2 simulation) created by dsl
- Internal (synchronous) clock source - External (asynchronous) …
5:21 PM Ticket #2 (avr - ATMEGA8A: 16-bit Timer/Counter1 simulation) created by dsl
- Internal and external clock source - Prescaling - Normal …
5:15 PM Ticket #1 (avr - ATMEGA8A: 8-bit Timer/Counter0 simulation) created by dsl
- Internal and external clock sources - Normal mode (the only mode …

Mar 29, 2018:

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